{"provider_name":"Hatena Blog","categories":["assembly","mips","fpga"],"title":"CPU\u3092\u3064\u304f\u308b ~ FPGA\u7de8 ~","published":"2022-01-02 21:49:37","description":"\u6982\u8981 FPGA\u4e0a\u3067\u52d5\u4f5c\u3059\u308bMIPS\u30d7\u30ed\u30bb\u30c3\u30b5\u3092\u4f5c\u3063\u305f\u306e\u3067\u5b66\u7fd2\u306e\u6d41\u308c\u3084\u5927\u307e\u304b\u306a\u4f5c\u308a\u65b9\u3092\u307e\u3068\u3081\u308b\u3002 https://github.com/0n1shi/mips-fpga \u6210\u679c\u7269 FPGA\u3067\u3064\u304f\u3063\u305fMIPS\u4e0a\u3067\u30d5\u30a3\u30dc\u30ca\u30c3\u30c1\u6570\u306e\u8a08\u7b97\u304c\u52d5\u3044\u305f\uff01\u4ee5\u524dGo\u3067\u66f8\u3044\u305fMIPS\u306e\u30a8\u30df\u30e5\u30ec\u30fc\u30bf\u3068\u3082\u7d50\u679c\u304c\u4e00\u81f4\u3057\u3066\u3044\u308b\u30fb\u30fb\u30fb\uff01 pic.twitter.com/OX3Vg64LB5\u2014 0n1shi (@0n1shi) 2021\u5e745\u670815\u65e5","blog_url":"https://0n1shi.hatenablog.jp/","version":"1.0","author_name":"k_0n1shi","height":"190","blog_title":"Nullable","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2F0n1shi.hatenablog.jp%2Fentry%2F2022%2F01%2F02%2F214937\" title=\"CPU\u3092\u3064\u304f\u308b ~ FPGA\u7de8 ~ - Nullable\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","image_url":"https://socialify.git.ci/0n1shi/mips-fpga/image?description=1&descriptionEditable=MIPS%20architecure%20processor%20on%20Intel%20FPGA.&forks=1&issues=1&language=1&owner=1&pulls=1&stargazers=1&theme=Dark","type":"rich","width":"100%","author_url":"https://blog.hatena.ne.jp/k_0n1shi/","provider_url":"https://hatena.blog","url":"https://0n1shi.hatenablog.jp/entry/2022/01/02/214937"}