{"description":"When you build a micro-processor which achives good code density, you tend to choose a ISA(instruction set architecture) which instruction length is short. Likewise, you want to make each instruction have same length which demands less amount of circuit. Small circuit also allows high clock cycle. H\u2026","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fabo-junghichi.hatenablog.jp%2Fentry%2F65750607\" title=\"Variable length instruction ISA has almost no benefit - \u4e00\u4eba\u4e00\u515a\u515a\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","type":"rich","blog_title":"\u4e00\u4eba\u4e00\u515a\u515a","published":"2016-12-19 01:03:29","width":"100%","categories":["\u30d7\u30ed\u30b0\u30e9\u30df\u30f3\u30b0","#\u5de5\u5b66"],"image_url":null,"height":"190","author_url":"https://blog.hatena.ne.jp/abo_junghichi/","title":"Variable length instruction ISA has almost no benefit","author_name":"abo_junghichi","blog_url":"https://abo-junghichi.hatenablog.jp/","url":"https://abo-junghichi.hatenablog.jp/entry/65750607","version":"1.0","provider_name":"Hatena Blog","provider_url":"https://hatena.blog"}