{"html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fblog-e.uosoft.net%2Fentry%2F20091004%2F1254587052\" title=\"FPGA\u95a2\u9023\u306e\u304a\u3059\u3059\u3081\u30b5\u30a4\u30c8\u306e\u307e\u3068\u3081 - \u96fb\u5b50\u8da3\u5473\u306e\u90e8\u5c4b\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","author_name":"uosoft","categories":["FPGA","\u96fb\u5b50\u5de5\u4f5c"],"url":"https://blog-e.uosoft.net/entry/20091004/1254587052","image_url":"https://images-fe.ssl-images-amazon.com/images/I/51JW594PGXL._SL160_.jpg","provider_name":"Hatena Blog","provider_url":"https://hatena.blog","width":"100%","author_url":"https://blog.hatena.ne.jp/uosoft/","published":"2009-10-04 01:24:12","blog_title":"\u96fb\u5b50\u8da3\u5473\u306e\u90e8\u5c4b","description":"\u6628\u65e5\u306e\u30a8\u30f3\u30c8\u30ea\u30fcFPGA\u306e\u3053\u3068\u304c\u516c\u8868\u3060\u3063\u305f\u306e\u3067\u3001FPGA\u95a2\u9023\u306e\u304a\u52e7\u3081\u30b5\u30a4\u30c8\u3092\u3044\u304f\u3064\u304b\u7d39\u4ecb\u3057\u307e\u3059\u3002 \u30e1\u30fc\u30ab\u30fc\u30b5\u30a4\u30c8 \u307e\u305a\u306f\u30e1\u30fc\u30ab\u30fc\u30b5\u30a4\u30c8\u306e\u7d39\u4ecb\u3002 FPGA\u306e\u4ed5\u69d8\u3084\u958b\u767a\u30fb\u5b66\u7fd2\u30dc\u30fc\u30c9\u306e\u8a73\u7d30\u304c\u5206\u304b\u308a\u307e\u3059\u3002\u958b\u767a\u30c4\u30fc\u30eb\u306e\u30c0\u30a6\u30f3\u30ed\u30fc\u30c9\u3082\u3067\u304d\u307e\u3059\u3002XILINX Spartan\u30b7\u30ea\u30fc\u30ba\u306e\u30e1\u30fc\u30ab\u30fcALTERA Cyclone\u30b7\u30ea\u30fc\u30ba\u306e\u30e1\u30fc\u30ab\u30fc \u958b\u767a\u30dc\u30fc\u30c9\u7d39\u4ecb\u306e\u76f4\u30ea\u30f3\u30af Spartan-3E \u30b9\u30bf\u30fc\u30bf \u30ad\u30c3\u30c8 \u4e00\u756a\u57fa\u672c\u306e\u30dc\u30fc\u30c9\u3002Spartan-3A \u30b9\u30bf\u30fc\u30bf \u30ad\u30c3\u30c8 partan-3E\u306e\u4e0a\u4f4d\u306b\u3042\u305f\u308bSpartan-3A\u304c\u4e57\u3063\u3066\u307e\u3059\u3002\uff17\uff10\u4e07\u30b2\u30fc\u30c8\u3002Cyclone II FPGA \u30b9\u30bf\u30fc\u30bf\u958b\u767a\u30ad\u30c3\u30c8\uff08Altera\u793eDE\u2026","height":"190","version":"1.0","title":"FPGA\u95a2\u9023\u306e\u304a\u3059\u3059\u3081\u30b5\u30a4\u30c8\u306e\u307e\u3068\u3081","blog_url":"https://blog-e.uosoft.net/","type":"rich"}