{"author_url":"https://blog.hatena.ne.jp/dot_h2o2/","type":"rich","published":"2015-12-31 00:00:00","categories":["FPGA"],"height":"190","url":"https://dot-h2o2.hatenadiary.org/entry/20151231/p1","title":"TD4\u306e\u62e1\u5f35\u691c\u8a0e\u3068TD8\u5316","provider_url":"https://hatena.blog","blog_title":".h2o\u306e\u304a\u6c17\u697d\u65e5\u8a18","width":"100%","provider_name":"Hatena Blog","image_url":null,"html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fdot-h2o2.hatenadiary.org%2Fentry%2F20151231%2Fp1\" title=\"TD4\u306e\u62e1\u5f35\u691c\u8a0e\u3068TD8\u5316 - .h2o\u306e\u304a\u6c17\u697d\u65e5\u8a18\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","author_name":"dot_h2o2","description":"\u4eca\u5e74\u3082\u3042\u3068\u308f\u305a\u304b\u3060\u3051\u3069\u3001\u3069\u3093\u306a\u6848\u304c\u3042\u308b\u306e\u304b\u8abf\u3079\u3066\u307f\u305f\u3002 8bit\u5316(\u30ec\u30b8\u30b9\u30bf\u30fc\u3068\u30d0\u30b9\u3001\u30a2\u30c9\u30ec\u30b9\u3092\u62e1\u5f35\u3059\u308b):http://hexprobe.nbug.net/hard:cpu:td4 \u547d\u4ee4\u8ffd\u52a0 RAM\u3092\u5b9f\u88c5 ROM\u3092\u30d6\u30ed\u30c3\u30afRAM\u3067\u5b9f\u88c5\u3059\u308b\uff08FPGA\u9650\u5b9a\uff09 \u5358\u7d14\u306a8bit\u5316\u306f\u7c21\u5358\u305d\u3046\u306a\u306e\u3067\u8a66\u3057\u3066\u307f\u305f\u3002","blog_url":"https://dot-h2o2.hatenadiary.org/","version":"1.0"}