{"provider_name":"Hatena Blog","image_url":null,"url":"https://hagecell.hatenadiary.org/entry/20071027","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fhagecell.hatenadiary.org%2Fentry%2F20071027\" title=\"refine_subpel\u306eSPU\u5316 - Cell\u3067\u304c\u3093\u3070\u3063\u3066\u307f\u305f\u30ed\u30b0\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","published":"2007-10-27 00:00:00","categories":[],"title":"refine_subpel\u306eSPU\u5316","width":"100%","author_url":"https://blog.hatena.ne.jp/hagecell/","blog_title":"Cell\u3067\u304c\u3093\u3070\u3063\u3066\u307f\u305f\u30ed\u30b0","type":"rich","description":"SPU\u5316\u3059\u308b\u30b3\u30fc\u30c9\u3092\u7cbe\u67fb\u3059\u308b\u305f\u3081\u306boprofile\u3092\u5b9f\u65bd\u3057\u3066\u307f\u305f\u3002\u304c\u30012.6.23-rc3\u30ab\u30fc\u30cd\u30eb\u306foprofile\u306e\u30e2\u30b8\u30e5\u30fc\u30eb\u304c\u5165\u3063\u3066\u3044\u306a\u3044\u306e\u3067\u5b9f\u884c\u3067\u304d\u305a\u3002\u3078\u305f\u308c\u306a\u81ea\u5206\u3068\u3057\u3066\u306f\u30ab\u30fc\u30cd\u30eb\u30b3\u30f3\u30d1\u30a4\u30eb\u307e\u3067\u305b\u305a\u3001fedora\u7d14\u6b63\u30ab\u30fc\u30cd\u30eb\u306e2.6.22\u3067boot\u3057\u3066\u5b9f\u884c\u3059\u308b\u3002\u306a\u305c\u304bcallgraph\u306f\u53d6\u308c\u306a\u3044\u3051\u3069\u5b9f\u884c\u7d50\u679c\u306f\u5f97\u3089\u308c\u305f\u30022\u6708\u306egprof\u306e\u7d50\u679c\u3068\u306f\u9055\u3046\u90e8\u5206\u3082\u3042\u308b\u3057\u540c\u3058\u3088\u3046\u306a\u90e8\u5206\u3082\u3042\u308b\u3002 CPU: CPU with timer interrupt, speed 0 MHz (estimated) Profiling through timer interrupt samples % symbo\u2026","version":"1.0","author_name":"hagecell","blog_url":"https://hagecell.hatenadiary.org/","provider_url":"https://hatena.blog","height":"190"}