{"type":"rich","version":"1.0","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fmsyksphinz.hatenablog.com%2Fentry%2F2016%2F08%2F29%2F020000\" title=\"Zynq ZedBoard\u3092\u4f7f\u3063\u3066PS\u3068PL\u306e\u5354\u8abf\u30d7\u30ed\u30b0\u30e9\u30df\u30f3\u30b0\u5165\u9580(3) - FPGA\u958b\u767a\u65e5\u8a18\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","height":"190","url":"https://msyksphinz.hatenablog.com/entry/2016/08/29/020000","author_name":"msyksphinz","description":"\u524d\u56de\u307e\u3067\u3067IP\u306e\u751f\u6210\u304c\u5b8c\u4e86\u3057\u305f\u306e\u3067\u3001Wrapper\u3092\u4f5c\u6210\u3057\u3066bitstream\u306e\u5408\u6210\u306e\u6e96\u5099\u306b\u5165\u308b\u3002 \u4f7f\u7528\u30c4\u30fc\u30eb : Vivado 2016.2 \u4f7f\u7528OS : Windows 10 FPGA\u7528\u306eBitstream\u3092\u4f5c\u6210\u3059\u308b msyksphinz.hatenablog.com msyksphinz.hatenablog.com Source\u30da\u30a4\u30f3\u3067[design_1]\u3092\u53f3\u30af\u30ea\u30c3\u30af\u3057\u3066[Create HDL Wrapper]\u3092\u30af\u30ea\u30c3\u30af\u3059\u308b\u3002 \u6b21\u306b\u3001\u540c\u3058\u304f[Source]\u30da\u30a4\u30f3\u3067[design_1]\u3092\u53f3\u30af\u30ea\u30c3\u30af\u3057\u3066[Generate Output Products]\u3092\u30af\u30ea\u30c3\u30af\u3059\u308b\u3002 \u3053\u308c\u306b\u3088\u308a\u3001IP\u3092\u2026","title":"Zynq ZedBoard\u3092\u4f7f\u3063\u3066PS\u3068PL\u306e\u5354\u8abf\u30d7\u30ed\u30b0\u30e9\u30df\u30f3\u30b0\u5165\u9580(3)","published":"2016-08-29 02:00:00","provider_url":"https://hatena.blog","blog_title":"FPGA\u958b\u767a\u65e5\u8a18","blog_url":"https://msyksphinz.hatenablog.com/","image_url":"https://cdn-ak.f.st-hatena.com/images/fotolife/m/msyksphinz/20160601/20160601001536.png","provider_name":"Hatena Blog","width":"100%","categories":["FPGA"],"author_url":"https://blog.hatena.ne.jp/msyksphinz/"}