{"version":"1.0","blog_title":"FPGA\u958b\u767a\u65e5\u8a18","published":"2017-12-27 02:00:00","author_name":"msyksphinz","provider_url":"https://hatena.blog","description":"CQ\u51fa\u7248\u306eInterface\u8a8c2018\u5e742\u6708\u53f7\u304b\u3089\u3001RISC-V\u306b\u3064\u3044\u3066\u9023\u8f09\u3092\u5bc4\u7a3f\u3057\u307e\u3057\u305f\u3002\u30bf\u30a4\u30c8\u30eb\u306f\u3001\u300c\u30aa\u30fc\u30d7\u30f3\u30bd\u30fc\u30b9CPU\u300cRISC-V\u300d\u306e\u7814\u7a76\u300d\u3067\u3059\u3002 \u7d50\u69cb\u306a\u6587\u7ae0\u3068\u56f3\u3092\u5bc4\u7a3f\u3057\u305f\u306e\u3060\u3051\u308c\u3069\u3082\u3001\u7d19\u9762\u306e\u90fd\u5408\u4e0a\u3067\u9023\u8f09\u306b\u306a\u3063\u305f\u3089\u3057\u3044\u3002\u4f55\u56de\u7d9a\u304f\u306e\u304b\u306f\u308f\u304b\u308a\u307e\u305b\u3093\u304c\u3001\u3086\u3063\u304f\u308a\u3068\u304a\u4ed8\u304d\u5408\u3044\u3044\u305f\u3060\u3051\u308c\u3070\u3002 \u3061\u306a\u307f\u306b\u4eca\u6708\u53f7\u306f\u6b74\u53f2\u3068\u767b\u5834\u306e\u80cc\u666f\u306a\u306e\u3067\u3001\u6280\u8853\u7684\u306b\u306f\u3042\u307e\u308a\u9762\u767d\u304f\u306a\u3044\u3002\u672c\u5f53\u306fCPU\u3068\u7279\u8a31\u306e\u6b74\u53f2\u3068\u304b\u3082\u3063\u3068\u8abf\u3079\u3066\u6df1\u5800\u3057\u305f\u3044\u3093\u3060\u3051\u3069\u306a\u3042\u3002 SuperH\u3068\u30e2\u30c8\u30ed\u30fc\u30e9\u306e\u8a71\u3068\u304b\u3001\u3059\u3054\u304f\u9762\u767d\u305d\u3046\u3060\u3002 \u3061\u306a\u307f\u306b\u30b9\u30c8\u30fc\u30ea\u30fc\u3068\u3057\u3066\u306f\u3001\u5927\u304d\u304f\u5206\u3051\u3066 RISC-V\u306b\u3064\u3044\u3066 RISC-V\u306e\u4ed5\u69d8\u306b\u3064\u3044\u3066 HiFive1\u3092\u4f7f\u3063\u3066\u307f\u2026","type":"rich","url":"https://msyksphinz.hatenablog.com/entry/2017/12/27/020000","blog_url":"https://msyksphinz.hatenablog.com/","categories":[],"width":"100%","title":"RISC-V\u306e\u9023\u8f09\u3092Interface\u8a8c\u306b\u5bc4\u7a3f\u3057\u307e\u3057\u305f(2018\u5e742\u6708\u53f7\u304b\u3089)","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fmsyksphinz.hatenablog.com%2Fentry%2F2017%2F12%2F27%2F020000\" title=\"RISC-V\u306e\u9023\u8f09\u3092Interface\u8a8c\u306b\u5bc4\u7a3f\u3057\u307e\u3057\u305f(2018\u5e742\u6708\u53f7\u304b\u3089) - FPGA\u958b\u767a\u65e5\u8a18\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","provider_name":"Hatena Blog","author_url":"https://blog.hatena.ne.jp/msyksphinz/","height":"190","image_url":"https://cdn-ak.f.st-hatena.com/images/fotolife/m/msyksphinz/20171226/20171226225250.png"}