{"type":"rich","provider_name":"Hatena Blog","published":"2025-10-26 04:00:00","url":"https://msyksphinz.hatenablog.com/entry/2025/10/26/040000","author_url":"https://blog.hatena.ne.jp/msyksphinz/","image_url":null,"blog_title":"FPGA\u958b\u767a\u65e5\u8a18","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fmsyksphinz.hatenablog.com%2Fentry%2F2025%2F10%2F26%2F040000\" title=\"Zero-day-lab \u306e IOMMU \u5b9f\u88c5\u8abf\u67fb (1. \u30a4\u30f3\u30bf\u30d5\u30a7\u30fc\u30b9\u8abf\u67fb) - FPGA\u958b\u767a\u65e5\u8a18\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","author_name":"msyksphinz","blog_url":"https://msyksphinz.hatenablog.com/","provider_url":"https://hatena.blog","version":"1.0","width":"100%","categories":[],"height":"190","description":"Zero-Day Lab\u306eRISC-V IOMMU\u306f RISC-V\u4ed5\u69d8\u306eIOMMU\u306eRTL\u5b9f\u88c5\u3060\u3002IOMMU\u306e\u4ed5\u69d8\u3092\u7406\u89e3\u3059\u308b\u305f\u3081\u306b\u3082\u3001\u5b9f\u88c5\u3092\u4e00\u5ea6\u6982\u89b3\u3057\u3066\u307f\u3088\u3046\u3002 github.com RISC-V IOMMU\u306e\u30a4\u30f3\u30bf\u30d5\u30a7\u30fc\u30b9\u4ed5\u69d8 \u30d1\u30e9\u30e1\u30fc\u30bf \u30ad\u30e3\u30c3\u30b7\u30e5\u30fb\u30a8\u30f3\u30c8\u30ea\u6570\u306e\u8a2d\u5b9a parameter int unsigned IOTLB_ENTRIES = 4, // IOTLB\u30a8\u30f3\u30c8\u30ea\u6570 parameter int unsigned DDTC_ENTRIES = 4, // DDTC\u30a8\u30f3\u30c8\u30ea\u6570 parameter int unsigned PDTC_ENTRIES = 4, // PDTC\u30a8\u30f3\u30c8\u30ea\u6570 \u2026","title":"Zero-day-lab \u306e IOMMU \u5b9f\u88c5\u8abf\u67fb (1. \u30a4\u30f3\u30bf\u30d5\u30a7\u30fc\u30b9\u8abf\u67fb)"}