{"image_url":null,"title":"RISC-V OoO CPU\u3092\u5b9f\u88c5\u3059\u308b (21. \u6574\u5f62\u3001assertion\u3001\u53c2\u7167ISS\u306e\u30b3\u30f3\u30c6\u30ca\u5316)","width":"100%","categories":[],"provider_url":"https://hatena.blog","provider_name":"Hatena Blog","blog_title":"FPGA\u958b\u767a\u65e5\u8a18","version":"1.0","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fmsyksphinz.hatenablog.com%2Fentry%2F2026%2F09%2F24%2F040000\" title=\"RISC-V OoO CPU\u3092\u5b9f\u88c5\u3059\u308b (21. \u6574\u5f62\u3001assertion\u3001\u53c2\u7167ISS\u306e\u30b3\u30f3\u30c6\u30ca\u5316) - FPGA\u958b\u767a\u65e5\u8a18\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","published":"2026-09-24 04:00:00","url":"https://msyksphinz.hatenablog.com/entry/2026/09/24/040000","author_url":"https://blog.hatena.ne.jp/msyksphinz/","description":"\u524d\u56de\u3067\u4f8b\u5916\u60c5\u5831\u3092\u30ec\u30b8\u30b9\u30bf1\u500b\u306b\u96c6\u7d04\u3057\u3001riscv-tests\u306f52/54\u3067\u6b62\u307e\u3063\u3066\u3044\u308b\u3002 \u6b8b\u308a2\u672c\u306f\u6a5f\u80fd\u304c\u672a\u5b9f\u88c5\u306a\u306e\u3067\u3001\u3044\u3063\u305f\u3093\u691c\u8a3c\u5074\u306e\u6574\u5099\u306b\u56de\u3063\u305f\u56de\u3002 RTL\u5168\u4f53\u306e\u6574\u5f62\u3001store\u7d4c\u8def\u3078\u306eassertion\u8ffd\u52a0\u3001\u53c2\u7167ISS\u3092\u52d5\u304b\u3059\u305f\u3081\u306e\u74b0\u5883\u4f5c\u308a\u306e3\u3064\u3002 RTL\u5168\u4f53\u3092\u81ea\u4f5c\u30d5\u30a9\u30fc\u30de\u30c3\u30bf\u3067\u6574\u5f62\u3057\u76f4\u3059 Emacs\u5074\u306eSystemVerilog\u30d1\u30c3\u30b1\u30fc\u30b8\u3092\u5165\u308c\u66ff\u3048\u305f\u306e\u3067\u3001\u6574\u5f62\u898f\u5247\u3082\u305d\u308c\u306b\u5408\u308f\u305b\u305f\u3002 \u30d1\u30c3\u30b1\u30fc\u30b8\u306b\u306fCLI\u304c\u4ed8\u3044\u3066\u3044\u308b\u306e\u3067\u3001\u30ea\u30dd\u30b8\u30c8\u30ea\u5168\u4f53\u306b\u4e00\u62ec\u3067\u304b\u3051\u3089\u308c\u308b\u3002 find core/rtl common/rtl -name '*.sv' -print0 \\ | xargs -0 <sv-kit\u2026","author_name":"msyksphinz","blog_url":"https://msyksphinz.hatenablog.com/","height":"190","type":"rich"}