{"blog_title":"tkato\u2019s blog","author_name":"tkat0","url":"https://tkat0.hateblo.jp/entry/2017/05/02/181700","categories":[],"width":"100%","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Ftkat0.hateblo.jp%2Fentry%2F2017%2F05%2F02%2F181700\" title=\"BNN-PYNQ\u3092\u7406\u89e3\u3059\u308b(1) FAQ - tkato\u2019s blog\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","provider_url":"https://hatena.blog","published":"2017-05-02 18:17:00","author_url":"https://blog.hatena.ne.jp/tkat0/","version":"1.0","blog_url":"https://tkat0.hateblo.jp/","type":"rich","title":"BNN-PYNQ\u3092\u7406\u89e3\u3059\u308b(1) FAQ","provider_name":"Hatena Blog","height":"190","image_url":null,"description":"3\u6708\u4ee5\u964d\u3001\u4ed5\u4e8b\u304c\u6fc0\u3057\u304f\u306a\u308a\u3001\u4f59\u6687\u3082\u307b\u3068\u3093\u3069\u4ed5\u4e8b\u306b\u95a2\u308f\u308b\u5206\u91ce\u306e\u52c9\u5f37\u306b\u5f53\u3066\u3066\u3044\u307e\u3057\u305f\u3002 \u4ee5\u4e0b\u306e5/20\u306e\u30a4\u30d9\u30f3\u30c8\u51fa\u5e2d\u306b\u5411\u3051\u3066\u3001DeepLearning x FPGA\u306e\u52c9\u5f37\u3092\u518d\u958b\u3057\u307e\u3057\u305f\u3002 \u300cPYNQ\u796d\u308a\u300d\u5ef6\u9577\u6226 : FPGA\u30c7\u30a3\u30fc\u30d7\u30e9\u30fc\u30cb\u30f3\u30b0\u5b9f\u8df5\u61c7\u89aa\u4f1a - connpass \u307e\u305a\u306f\u3001\u624b\u8fd1\u306a\u52c9\u5f37\u6750\u6599\u3068\u3057\u3066BNN-PYNQ\u306e\u30bd\u30fc\u30b9\u3092\u89e3\u6790\u3057\u3066\u307f\u307e\u3057\u305f\u3002 \u52c9\u5f37\u3057\u305f\u5185\u5bb9\u306f\u3001\u30d6\u30ed\u30b0\u306b\u4f55\u56de\u304b\u306b\u5206\u3051\u3066\u66f8\u304d\u305f\u3044\u3068\u601d\u3044\u307e\u3059\u3002 \u5c1a\u3001BNN-PYNQ\u306e\u30bd\u30fc\u30b9\u30b3\u30fc\u30c9\u306f5/2\u6642\u70b9\u3067\u6700\u65b0\u306e\u3082\u306e\u3092\u4f7f\u3044\u307e\u3057\u305f\u3002 GitHub - Xilinx/BNN-PYNQ at a86e0863418ce4161ed61b69ba89ec14\u2026"}