{"provider_name":"Hatena Blog","author_url":"https://blog.hatena.ne.jp/Vengineer/","blog_url":"https://vengineer.hatenablog.com/","url":"https://vengineer.hatenablog.com/entry/2021/04/17/090219","blog_title":"Vengineer\u306e\u5984\u60f3","published":"2021-04-17 09:02:19","categories":[],"type":"rich","provider_url":"https://hatena.blog","image_url":null,"description":"@Vengineer\u306e\u622f\u8a00 : Twitter SystemVerilog\u306e\u4e16\u754c\u3078\u3088\u3046\u3053\u305d\u3001\u3059\u3079\u3066\u306f\u3001SystemC v0.9\u516c\u958b\u304b\u3089\u59cb\u307e\u3063\u305f \u306f\u3058\u3081\u306b \u300cVerilator \u304c\u51c4\u3044\u3053\u3068\u306b\u306a\u3063\u3066\u3044\u308b\u300d\u3092\u3053\u306e\u30d6\u30ed\u30b0\u3067\u53d6\u308a\u4e0a\u3052\u305f\u306e\u306f\u30012019\u5e7411\u670823\u65e5vengineer.hatenablog.com\u305d\u306e\u5f8c\u3001\u4f55\u5ea6\u304b\u3001Verilator \u3092\u53d6\u308a\u4e0a\u3052\u307e\u3057\u305f\u3002\u3053\u3093\u306a\u611f\u3058\u3002\u6700\u8fd1\u3067\u306f\u3001Xilinx \u306e QEMU + SystemC + Verilator \u306e\u4f8b\u984c\u3092\u89e3\u6790\u3057\u305f\u308a\u3082\u3057\u307e\u3057\u305f\u3002Xilinx\u306eQEMU + SystemC + Verilog HDL (Verilator) \u306e\u30c7\u30e2\u306e\u5185\u5bb9\u3092\u63a2\u3063\u3066\u3044\u304f(\u2026","width":"100%","title":"Verilator\u306e\u4e2d\u3092\u8abf\u3079\u308b(\u305d\u306e1)","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F2021%2F04%2F17%2F090219\" title=\"Verilator\u306e\u4e2d\u3092\u8abf\u3079\u308b(\u305d\u306e1) - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","height":"190","version":"1.0","author_name":"Vengineer"}