{"published":"2021-10-11 09:00:00","author_url":"https://blog.hatena.ne.jp/Vengineer/","image_url":null,"title":"Intel DMI (Direct Media Interface)\u306e\u5fa9\u7fd2\u3092\u3057\u3066\u307f\u305f","blog_title":"Vengineer\u306e\u5984\u60f3","blog_url":"https://vengineer.hatenablog.com/","provider_name":"Hatena Blog","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F2021%2F10%2F11%2F090000\" title=\"Intel DMI (Direct Media Interface)\u306e\u5fa9\u7fd2\u3092\u3057\u3066\u307f\u305f - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","provider_url":"https://hatena.blog","height":"190","categories":[],"author_name":"Vengineer","type":"rich","url":"https://vengineer.hatenablog.com/entry/2021/10/11/090000","description":"\u306f\u3058\u3081\u306b \u6628\u65e5\u306e\u534a\u5c0e\u4f53\u30c1\u30c3\u30d7\u306e\u96d1\u8ac7\u3067\u3001Intel Gen12 & Chipset \u306e\u304a\u8a71\u3092\u3057\u307e\u3057\u305f\u3002 \u6bce\u9031\u65e5\u66dc\u65e5\u306e11:00-12:00\u306b\u534a\u5c0e\u4f53\u30c1\u30c3\u30d7\u306e\u96d1\u8ac7\u3092\u3084\u3063\u3066\u3044\u307e\u3059\u3002\u6765\u903110/10(\u65e5)\u306eGoogle Meet\u306f https://t.co/nO0WPvIk2k\u3067\u3059Intel Gen12 CPU\u306b\u3064\u3044\u3066\u3001\u96d1\u8ac7\u3092\u3057\u307e\u3059\u3002\u95a2\u9023\u30d6\u30ed\u30b0\uff1aIntel\u306eGen 12 \u3068 Chipset \u306f\u3001SERDES\u3060\u3089\u3051\uff1fhttps://t.co/3aEPznTtRQ\u2014 Vengineer\uff20 (@Vengineer) 2021\u5e7410\u67089\u65e5 \u304a\u8a71\u306e\u4e2d\u3067\u3001CPU <=> I/O Chipset \u306e\u9593\u306e DMI \u304c x\u2026","width":"100%","version":"1.0"}