{"image_url":null,"title":"SiliconCompiler\u306e\u30b5\u30f3\u30d7\u30eb\u30b3\u30fc\u30c9\u306e\u30ed\u30b0\u3092\u773a\u3081\u308b(\u305d\u306e1)","type":"rich","description":"# \u306f\u3058\u3081\u306b SiliconCompiler\u306e\u4e0b\u8a18\u306e\u30b5\u30f3\u30d7\u30eb\u30b3\u30fc\u30c9 (heartbeat.v)\u3092\u4f7f\u3063\u305f\u30ed\u30b0\u3092\u773a\u3081\u3066\u307f\u307e\u3059\u3002 hearbeat.v module heartbeat #(parameter N = 8) ( //inputs input clk,// clock input nreset,//async active low reset output reg out //heartbeat ); reg [N-1:0] counter_reg; always @ (posedge clk or negedge nreset) if(!nreset) begin counter_r\u2026","author_url":"https://blog.hatena.ne.jp/Vengineer/","blog_url":"https://vengineer.hatenablog.com/","width":"100%","version":"1.0","url":"https://vengineer.hatenablog.com/entry/2021/12/16/090000","published":"2021-12-16 09:00:00","author_name":"Vengineer","provider_name":"Hatena Blog","categories":[],"height":"190","blog_title":"Vengineer\u306e\u5984\u60f3","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F2021%2F12%2F16%2F090000\" title=\"SiliconCompiler\u306e\u30b5\u30f3\u30d7\u30eb\u30b3\u30fc\u30c9\u306e\u30ed\u30b0\u3092\u773a\u3081\u308b(\u305d\u306e1) - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","provider_url":"https://hatena.blog"}