{"provider_url":"https://hatena.blog","version":"1.0","blog_title":"Vengineer\u306e\u5984\u60f3","categories":["SystemVerilog","#\u6280\u8853\u8077"],"provider_name":"Hatena Blog","author_url":"https://blog.hatena.ne.jp/Vengineer/","published":"2011-12-28 17:57:43","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F65880453\" title=\"signed/unsigned \u3068 shortreal - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","blog_url":"https://vengineer.hatenablog.com/","type":"rich","description":"Verification Evangelist\u306e\u622f\u8a00 : Twitter SystemVerilog\u306e\u4e16\u754c\u3078\u3088\u3046\u3053\u305d\u3001\u3059\u3079\u3066\u306f\u3001SystemC v0.9\u516c\u958b\u304b\u3089\u59cb\u307e\u3063\u305f SystemVerilog\u3067\u306f\u300132bit\u306esigned integer\u306einteger\u306e\u4ed6\u306b\u3001\u6b21\u306e\u6574\u6570\u304c\u5c0e\u5165\u3055\u308c\u307e\u3057\u305f\u3002 byte : 8bit signed integer shortint : 16bit signed integer int : 32bit signed integer longint : 64bit signed integer \u307e\u305f\u3001\u7b26\u53f7\u6709\u308a\u3060\u3051\u3067\u306a\u304f\u3001\u7b26\u53f7\u7121\u3057\u306e\u5909\u6570\u304c\u5c0e\u5165\u3055\u308c\u307e\u3057\u305f\u3002 byte s\u2026","author_name":"Vengineer","height":"190","image_url":null,"title":"signed/unsigned \u3068 shortreal","url":"https://vengineer.hatenablog.com/entry/65880453","width":"100%"}