{"title":"Zynq\u306eqemu (\u305d\u306e11)","author_name":"Vengineer","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F66352004\" title=\"Zynq\u306eqemu (\u305d\u306e11) - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","author_url":"https://blog.hatena.ne.jp/Vengineer/","width":"100%","height":"190","version":"1.0","description":"Verification Evangelist\u306e\u622f\u8a00 : Twitter SystemVerilog\u306e\u4e16\u754c\u3078\u3088\u3046\u3053\u305d\u3001\u3059\u3079\u3066\u306f\u3001SystemC v0.9\u516c\u958b\u304b\u3089\u59cb\u307e\u3063\u305f Zynq\u306eqemu (\u305d\u306e10)\u3067\u7d42\u308f\u308a\u3060\u3063\u305f\u3068\u601d\u3063\u3066\u3044\u305f\u3089\u3001\u3082\u3046\u4e00\u3064\u3002 hw/xilinx.c\u3067\u306f\u3001\u6b21\u306e\u3088\u3046\u306bcadence\u306e\u6587\u5b57\u304c\u3042\u308a\u307e\u3059\u3002\u3053\u308c\u306f\u3001\u30b1\u30a4\u30c7\u30f3\u30b9\u306eIP\u3067\u3059\u3002 248 sysbus_create_simple(\"cadence,iic\", 0xE0004000, pic[25]); // IRQ 57 249 sysbus_create_simple(\"cadence,iic\", 0xE0005000, pic\u2026","published":"2012-04-11 17:13:07","provider_name":"Hatena Blog","provider_url":"https://hatena.blog","type":"rich","blog_url":"https://vengineer.hatenablog.com/","url":"https://vengineer.hatenablog.com/entry/66352004","image_url":null,"categories":["Zynq / Xilinx","#\u6280\u8853\u8077"],"blog_title":"Vengineer\u306e\u5984\u60f3"}