{"blog_url":"https://vengineer.hatenablog.com/","version":"1.0","image_url":null,"provider_url":"https://hatena.blog","author_name":"Vengineer","width":"100%","blog_title":"Vengineer\u306e\u5984\u60f3","provider_name":"Hatena Blog","height":"190","url":"https://vengineer.hatenablog.com/entry/68420391","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F68420391\" title=\"HLS\u3067\u6d88\u8cbb\u96fb\u529b\u3092\u524a\u6e1b - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","type":"rich","categories":["Cadence","#\u6280\u8853\u8077"],"title":"HLS\u3067\u6d88\u8cbb\u96fb\u529b\u3092\u524a\u6e1b","published":"2013-11-22 06:36:20","description":"@Vengineer\u306e\u622f\u8a00 : Twitter SystemVerilog\u306e\u4e16\u754c\u3078\u3088\u3046\u3053\u305d\u3001\u3059\u3079\u3066\u306f\u3001SystemC v0.9\u516c\u958b\u304b\u3089\u59cb\u307e\u3063\u305f HLS\u3092\u4f7f\u3048\u3070\u3001\u958b\u767a\u751f\u7523\u6027\u304c\u4e0a\u304c\u308a\u3001\u6027\u80fd\u306e\u8abf\u6574\u3082\u30de\u30cb\u30e5\u30a2\u30eb\u8a18\u8ff0\u306eRTL\u3088\u308a\u3082\u697d\u30c1\u30f3\u3002 \u6700\u8fd1\u306f\u30e2\u30d0\u30a4\u30eb\u30a2\u30d7\u30ea\u30b1\u30fc\u30b7\u30e7\u30f3\u304c\u4e2d\u5fc3\u306b\u306a\u3063\u3066\u3044\u308b\u306e\u3067\u3001\u6d88\u8cbb\u96fb\u529b\u3092\u524a\u6e1b\u3057\u306a\u3044\u3068\u30c0\u30e1\uff01 \u30b1\u30a4\u30c7\u30f3\u30b9\u306e\u30d6\u30ed\u30b0\u3001 High-Level Synthesis\u2015What Expertise Is Needed for Micro-Architecture Tradeoffs?\u306f\u3001\u305d\u3053\u3093\u3068\u3053\u308d\u3082\u66f8\u3044\u3066\u3042\u308a\u307e\u3059\u3002 \u65e9\u3044\u3082\u3093\u3067\u3001\u30b1\u30a4\u30c7\u30f3\u30b9\u3001ESL\u30b3\u30df\u30e5\u30cb\u30c6\u30a3\u30fb\u30bb\u30df\u30ca\u30fc\u306b\u884c\u3063\u3066\u304b\u3089\u3001\u3082\u3046\u2026","author_url":"https://blog.hatena.ne.jp/Vengineer/"}