{"html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F69074379\" title=\"UVM 1.2\u6b63\u5f0f\u30ea\u30ea\u30fc\u30b9 - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","categories":["UVM","#\u6280\u8853\u8077"],"published":"2014-07-02 05:45:00","version":"1.0","description":"@Vengineer\u306e\u622f\u8a00 : Twitter SystemVerilog\u306e\u4e16\u754c\u3078\u3088\u3046\u3053\u305d\u3001\u3059\u3079\u3066\u306f\u3001SystemC v0.9\u516c\u958b\u304b\u3089\u59cb\u307e\u3063\u305f Accellera\u304cUVM 1.2\u3092\u30ea\u30ea\u30fc\u30b9\u3057\u307e\u3057\u305f\u3002 UVM 1.1\u306e\u30ea\u30ea\u30fc\u30b9\u304b\u30893\u5e74\u4ee5\u4e0a\u3001 \u305d\u306e\u9593\u306b\u30011.1a, 1.1b, 1.1c, 1.1d\u304c\u30ea\u30ea\u30fc\u30b9\u3055\u308c\u3066\u3044\u307e\u3059\u3002 \u3053\u306eUVM 1.2\u304cIEEE\u306e\u6a19\u6e96\u5316\u306b\u306a\u308b\u306e\u3067\u3059\u306d\u3002 \u30e1\u30bd\u30c9\u30ed\u30b8\u30fc\u8ad6\u4e89\u306f\u3001\u3053\u308c\u306b\u3066\u5b8c\u5168\u7d42\u7d50 \u306b\u306a\u308b\u306e\u3067\u3057\u3087\u3046\u304b\uff1f","provider_url":"https://hatena.blog","author_url":"https://blog.hatena.ne.jp/Vengineer/","height":"190","image_url":null,"blog_title":"Vengineer\u306e\u5984\u60f3","url":"https://vengineer.hatenablog.com/entry/69074379","type":"rich","author_name":"Vengineer","blog_url":"https://vengineer.hatenablog.com/","width":"100%","title":"UVM 1.2\u6b63\u5f0f\u30ea\u30ea\u30fc\u30b9","provider_name":"Hatena Blog"}