{"categories":["Zynq / Xilinx","#\u6280\u8853\u8077"],"url":"https://vengineer.hatenablog.com/entry/70342995","description":"@Vengineer\u306e\u622f\u8a00 : Twitter SystemVerilog\u306e\u4e16\u754c\u3078\u3088\u3046\u3053\u305d\u3001\u3059\u3079\u3066\u306f\u3001SystemC v0.9\u516c\u958b\u304b\u3089\u59cb\u307e\u3063\u305f Xilinx\u306eGitHub\u3092\u3044\u308d\u3044\u308d\u3068\u773a\u3081\u3066\u3044\u305f\u3089\u3001\u898b\u3064\u3051\u305f\u3002 \u3069\u3046\u3084\u3089\u3001Zynq MPSoC\u306f\u30e1\u30f3\u30bf\u30fc\u306e\u30a8\u30df\u30e5\u30ec\u30fc\u30bf\u3001Veloce\u3067\u691c\u8a3c\u3055\u308c\u305f\u3088\u3046\u3060\u3002 ARM Trusted Firmware\u306eplat/xilinx/zynqmp/aarch64/zynqmp_common.c\u306e\u95a2\u6570\u306e\u4e2d\u3092\u898b\u308b\u3068\u3001 switch (ver) { case ZYNQMP_CSU_VERSION_VELOCE: label = \"VELOCE\"; break; case \u2026","provider_url":"https://hatena.blog","height":"190","type":"rich","blog_title":"Vengineer\u306e\u5984\u60f3","author_name":"Vengineer","width":"100%","author_url":"https://blog.hatena.ne.jp/Vengineer/","title":"Zynq MPSoC\u306f\u30e1\u30f3\u30bf\u30fc\u306e\u30a8\u30df\u30e5\u30ec\u30fc\u30bf\u3067\u691c\u8a3c\u3055\u308c\u305f\uff1f","provider_name":"Hatena Blog","image_url":null,"html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fvengineer.hatenablog.com%2Fentry%2F70342995\" title=\"Zynq MPSoC\u306f\u30e1\u30f3\u30bf\u30fc\u306e\u30a8\u30df\u30e5\u30ec\u30fc\u30bf\u3067\u691c\u8a3c\u3055\u308c\u305f\uff1f - Vengineer\u306e\u5984\u60f3\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","published":"2016-01-17 09:29:38","version":"1.0","blog_url":"https://vengineer.hatenablog.com/"}