{"provider_name":"Hatena Blog","author_name":"mojiru","image_url":"https://m.media-amazon.com/images/I/51U3W8dYryL._SL160_.jpg","type":"rich","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fwww.mojiru.com%2Fentry%2FFPGA-Verilog\" title=\"TANG PriMER\u3067\u59cb\u3081\u308bFPGA\u5165\u9580\u66f8 - mojiru\u3010\u3082\u3058\u3092\u3082\u3058\u308b\u3011\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","description":"TANG PriMER\u3067\u59cb\u3081\u308bFPGA&Verilog\u5165\u9580 AI\u6642\u4ee3\u306e\u9ad8\u901f\u30fb\u4e26\u5217\u8a08\u7b97\u30c7\u30d0\u30a4\u30b9\u3078\u306e\u7b2c\u4e00\u6b69 \u300cTANG PriMER\u3067\u59cb\u3081\u308bFPGA&Verilog\u5165\u9580 AI\u6642\u4ee3\u306e\u9ad8\u901f\u30fb\u4e26\u5217\u8a08\u7b97\u30c7\u30d0\u30a4\u30b9\u3078\u306e\u7b2c\u4e00\u6b69\u300d\u767a\u884c\u4e3b\u65e8\u30fb\u5185\u5bb9\u7d39\u4ecb \u300cTANG PriMER\u3067\u59cb\u3081\u308bFPGA&Verilog\u5165\u9580 AI\u6642\u4ee3\u306e\u9ad8\u901f\u30fb\u4e26\u5217\u8a08\u7b97\u30c7\u30d0\u30a4\u30b9\u3078\u306e\u7b2c\u4e00\u6b69\u300d\u76ee\u6b21 \u300cTANG PriMER\u3067\u59cb\u3081\u308bFPGA&Verilog\u5165\u9580 AI\u6642\u4ee3\u306e\u9ad8\u901f\u30fb\u4e26\u5217\u8a08\u7b97\u30c7\u30d0\u30a4\u30b9\u3078\u306e\u7b2c\u4e00\u6b69\u300dAmazon\u3067\u306e\u8cfc\u5165\u306f\u3053\u3061\u3089 \u300cTANG PriMER\u3067\u59cb\u3081\u308bFPGA&Verilog\u5165\u9580 AI\u6642\u4ee3\u306e\u9ad8\u901f\u30fb\u4e26\u5217\u8a08\u7b97\u30c7\u30d0\u30a4\u30b9\u3078\u306e\u7b2c\u4e00\u6b69\u300d\u697d\u5929\u5e02\u5834\u3067\u306e\u8cfc\u5165\u2026","categories":["mojiru","book"],"published":"2020-07-03 12:00:00","blog_url":"https://www.mojiru.com/","height":"190","url":"https://www.mojiru.com/entry/FPGA-Verilog","provider_url":"https://hatena.blog","author_url":"https://blog.hatena.ne.jp/mojiru/","width":"100%","blog_title":"mojiru\u3010\u3082\u3058\u3092\u3082\u3058\u308b\u3011","version":"1.0","title":"TANG PriMER\u3067\u59cb\u3081\u308bFPGA\u5165\u9580\u66f8"}