{"published":"2016-07-20 16:16:00","image_url":null,"author_url":"https://blog.hatena.ne.jp/xmldtp/","type":"rich","title":"FPGA\u3067Ethernet\u3092\u64cd\u4f5c\u3059\u308b\u306b\u306f\uff1f(Openstack\u3067yahoo\u3092\u5012\u305b\u308b\u304b\uff1f\uff09","description":"\u30b0\u30ea\u30fc\u3055\u3093\u304c\u3001\u300c\u4efb\u5929\u5802\u306e\u5012\u3057\u65b9\u3001\u77e5\u3089\u306a\u3044\u3067\u3057\u3087\uff1f\u30aa\u30ec\u3089\u306f\u3082\u3046\u77e5\u3063\u3066\u307e\u3059\u3088\u300d \u3068\u3044\u3063\u305f\u305d\u3046\u3060\u3051\u3069\u3001YAHOO\u306f\u5012\u305b\u308b\u3067\u3057\u3087\u3046\u304b\uff1f OpenStack Days Tokyo\u3067\u3001YAHOO\u3055\u3093\u306f\u3001FPGA\u306b\u3064\u3044\u3066\u300cPython\u306a\u3069\u3067\u56de\u8def\u304c\u66f8\u3051\u308b\u3053\u3068\u304c\u91cd\u8981\u300d\u3068 \u8a00\u3063\u3066\u3044\u307e\u3057\u305f\u3002 \u3067\u3082\u3001\u5f53\u5206\u305d\u3093\u306a\u3082\u306e\u304c\u3001\u3067\u304d\u305d\u3046\u3082\u3042\u308a\u307e\u305b\u3093\u3002 \u3068\u3044\u3046\u3053\u3068\u306f\u3001HDL(Verilog\u3068\u304b\uff09\u3067\u3001OpenStack\u306e\u30cd\u30c3\u30c8\u30ef\u30fc\u30af\u304c\u66f8\u3051\u308c\u3070 \u5012\u305b\u305d\u3046\u3067\u3059\uff1f\uff1f\uff1f \u3068\u3044\u3046\u3053\u3068\u3067\uff1f\uff1f\uff1fFPGA\u3067\u30cd\u30c3\u30c8\u30ef\u30fc\u30af\u3001\u5177\u4f53\u7684\u306b\u306fEthernet\u3092\u64cd\u4f5c\u3059\u308b\u65b9\u6cd5\u3092 \u307e\u3068\u3081\u3066\u307f\u305f\u3044\u3068\u601d\u3044\u307e\u3059 \u25a0\u306a\u305c\u3001OpenStack\u3067FPGA\u306a\u306e\u304b\uff1f OpenSt\u2026","categories":["Weblog"],"blog_url":"https://xmldtp.hatenadiary.org/","provider_url":"https://hatena.blog","provider_name":"Hatena Blog","version":"1.0","width":"100%","blog_title":"\u30a6\u30a3\u30ea\u30a2\u30e0\u306e\u3044\u305f\u305a\u3089\u306e\u3001\u307e\u3061\u3042\u308b\u304d\u3001\u305f\u3079\u3042\u308b\u304d\u30fcPART2","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fxmldtp.hatenadiary.org%2Fentry%2F824dbbdeb2b6948a585bb182d3b43638\" title=\"FPGA\u3067Ethernet\u3092\u64cd\u4f5c\u3059\u308b\u306b\u306f\uff1f(Openstack\u3067yahoo\u3092\u5012\u305b\u308b\u304b\uff1f\uff09 - \u30a6\u30a3\u30ea\u30a2\u30e0\u306e\u3044\u305f\u305a\u3089\u306e\u3001\u307e\u3061\u3042\u308b\u304d\u3001\u305f\u3079\u3042\u308b\u304d\u30fcPART2\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","author_name":"xmldtp","height":"190","url":"https://xmldtp.hatenadiary.org/entry/824dbbdeb2b6948a585bb182d3b43638"}