{"url":"https://ymkwt.hatenadiary.org/entry/20090422/1240465427","html":"<iframe src=\"https://hatenablog-parts.com/embed?url=https%3A%2F%2Fymkwt.hatenadiary.org%2Fentry%2F20090422%2F1240465427\" title=\"FDR2\u3068\u306f - CSP(Communicating Sequential Processes)\" class=\"embed-card embed-blogcard\" scrolling=\"no\" frameborder=\"0\" style=\"display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;\"></iframe>","width":"100%","blog_url":"https://ymkwt.hatenadiary.org/","image_url":"https://cdn-ak.f.st-hatena.com/images/fotolife/y/ymkwt/20090526/20090526181551.jpg","title":"FDR2\u3068\u306f","provider_url":"https://hatena.blog","type":"rich","author_name":"ymkwt","version":"1.0","blog_title":"CSP(Communicating Sequential Processes)","provider_name":"Hatena Blog","published":"2009-04-22 14:43:47","description":"FDR2(Failures/Divergence Refinement 2)\u3068\u306fFormal Systems Europe Ltd. \u304c\u958b\u767a\u3057\u305fCSP\u306e\u81ea\u52d5\u691c\u8a3c\u30c4\u30fc\u30eb\u3067\u3042\u308b\u3002CSP\u3067\u8a18\u8ff0\u3057\u305f\u30d7\u30ed\u30bb\u30b9\u306eRefinment,Deadlock,Livelock,Determinism\u3092\u30c1\u30a7\u30c3\u30af\u3059\u308b\u3053\u3068\u304c\u3067\u304d\u308b\u3002\u4e0a\u8a18 Formal Systems \u306e\u30b5\u30a4\u30c8\u304b\u3089FDR2\u3001\u30de\u30cb\u30e5\u30a2\u30eb\u7b49\u304c\u30c0\u30a6\u30f3\u30ed\u30fc\u30c9\u3067\u304d\u308b\u3002\u5b9f\u884c\u306b\u306f\u3001\u74b0\u5883\u5909\u6570FDRHOME\u306bFDR2\u3092\u30a4\u30f3\u30b9\u30c8\u30fc\u30eb\u3057\u305f\u30eb\u30fc\u30c8\u30c7\u30a3\u30ec\u30af\u30c8\u30ea\u3092\u30bb\u30c3\u30c8\u3059\u308b\u5fc5\u8981\u304c\u3042\u308b\u3002 FDRHOME=~/FDR2/fdr-2.83-linux-academic export FDR\u2026","author_url":"https://blog.hatena.ne.jp/ymkwt/","height":"190","categories":["FDR2"]}