kiririmode https://blog.hatena.ne.jp/kiririmode/ 理系学生日記 https://kiririmode.hatenablog.jp/ SICP or-gate を，and-gate と inverter で構成しろという問題． こんな感じかと思われ． (define (or-gate a1 a2 output) (let ((x (make-wire)) (y (make-wire)) (z (make-wire))) (inverter a1 x) (inverter a2 y) (and-gate x y z) (inverter z output)) 'ok) 遅延の方は，inverter 2 つ分と and-gate 1 つ分ということで，2*inverter-delay + and-gate-delay になるかなー． 190 <iframe src="https://hatenablog-parts.com/embed?url=https%3A%2F%2Fkiririmode.hatenablog.jp%2Fentry%2F20080504%2Fp3" title="問題3-29 (3.3.4 A Simulator for Digital Circuits) - 理系学生日記" class="embed-card embed-blogcard" scrolling="no" frameborder="0" style="display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;"></iframe> Hatena Blog https://hatena.blog 2008-05-04 00:00:02 rich https://kiririmode.hatenablog.jp/entry/20080504/p3 1.0 100%