shigemk2 https://blog.hatena.ne.jp/shigemk2/ by shigemk2 https://www.shigemk2.com/ 勉強会 @ioriveur UC-berkeleyが(また)作ったアーキテクチャ 作り過ぎだろう RV32 RV64 (RV128 in future) Rocket core scalaで書かれたRISC-V実装 Rocket chipとはRISC-Vの実装であるrocket Chiselとは ucb-bar/chisel ucb-bar/chisel · GitHub code generator to Verilog or C++(emulator) Verilog - Wikipedia みんなはMakefile書こうね 動かない std::bad_alloc Scalaが自動生成したゴミのよ… 190 <iframe src="https://hatenablog-parts.com/embed?url=https%3A%2F%2Fwww.shigemk2.com%2Fentry%2F2015%2F02%2F14%2FRISC-V_Rocket_Chip%25E3%2582%2592%25E5%25A3%258A%25E3%2581%2599_%2523kernelvm" title="RISC-V Rocket Chipを壊す #kernelvm - by shigemk2" class="embed-card embed-blogcard" scrolling="no" frameborder="0" style="display: block; width: 100%; height: 190px; max-width: 500px; margin: 10px 0px;"></iframe> Hatena Blog https://hatena.blog 2015-02-14 21:34:34 rich https://www.shigemk2.com/entry/2015/02/14/RISC-V_Rocket_Chip%E3%82%92%E5%A3%8A%E3%81%99_%23kernelvm 1.0 100%